Conventional integrated circuit (IC) designs try to deliver power and ground from the package pins to the transistors as efficiently as possible. The power distribution network should have a minimal voltage variation and a high current carrying capability. Space for signal routes is also provided and needs to be connected on the same metal layers as the power distribution network. Using a large amount of metal to form the power distribution network solves the first two goals (i.e., minimal voltage variation and high current carrying capability). However, the solution to the first two goals often comes at the expense of the third goal (i.e., signal routing).
Conventional Place and Route CAD tools use regularly spaced and uniform width power grids. Regularly spaced, uniform width power grids are easy to implement. Regularly spaced, uniform width power grids can use as much or as little metal for power and ground routing as the design dictates. The uniform width and uniform spacing of the metal is chosen to deliver an appropriately low resistance between the power supply and the transistors on the IC.
Local power supply connections need to be consistent because circuits that are placed nearby are much more likely to be communicating with each other. As circuits get closer together, voltage matching between the respective power supplies of the circuits becomes more important. A regular power grid facilitates voltage matching because the regular power grid can provide a smooth voltage gradient without discontinuities. However, pre-routed circuits with pre-routed power grids and power connections only around the perimeter can create discontinuities. The creation of discontinuities is less important if the signal interfaces for the pre-routed circuits are designed to be robust to timing inaccuracy due to power supply voltage levels.
Package pin power and ground placement also has to balance the needs of both the PC Board designer and the IC designer. Compromises are often made due to the package technology chosen. When wire bond packages are used, the power and ground connections come from the edge of the IC and supply power and ground across the whole IC. In flip chip packaging, the power and ground connections can connect more centrally in the die. However, a re-distribution layer still imposes restrictions which can remove symmetry and regularity in the power connections.
The use of a regular power distribution grid on-chip along with irregularly placed point sources (i.e., power and ground IO connections) ensures power and ground voltage irregularities across the die. If the transistors of the IC are modeled as evenly placed power consumers, then an IC using a conventional wire-bond package will have a voltage drop across the middle of the die. The voltage will be held up only at points around the perimeter. The voltage drop can be visualized like a net draping from some points around the edge of the net.
Conventional power and ground routing follows a strict regular grid. However, analysis of the currents in a power mesh (i.e., grid) show that the current increases exponentially from almost zero near the middle of the IC to the highest values right at the power supply IO connection(s). Metal routing on an IC has some amount of resistance. The effects of the resistance of the metal routing cannot be totally eliminated. A large amount of overall voltage drop occurs in the immediate vicinity of the power supply connections because of the higher current.
It would be desirable to have a method and/or apparatus for optimizing a power grid that reduces effects of metal resistance on the power grid.